diff -uprN linux-v4.14-at10/arch/arm/boot/dts/armadillo-640.dts testADCfinal/arch/arm/boot/dts/armadillo-640.dts
--- linux-v4.14-at10/arch/arm/boot/dts/armadillo-640.dts	2018-12-26 11:44:47.000000000 +0900
+++ testADCfinal/arch/arm/boot/dts/armadillo-640.dts	2019-01-18 17:48:19.357370100 +0900
@@ -239,6 +239,15 @@
 			MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
 			>;
 	};
+
+	pinctrl_ecspi1: ecspi1grp {
+		fsl,pins = <
+			MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK	0x1b0b0 // CON9_15
+			MX6UL_PAD_LCD_DATA21__GPIO3_IO26	0x1b0b0 // CON9_16
+			MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI	0x1b0b0 // CON9_17
+			MX6UL_PAD_LCD_DATA23__ECSPI1_MISO	0x1b0b0 // CON9_18
+		>;
+	};
 };
 
 &usbotg1 {
@@ -293,3 +302,31 @@
 	timeout-sec = <10>;
 	fsl,ext-reset-output;
 };
+
+&ecspi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi1>;
+	cs-gpios =		<0>;
+	num-chipselects = <0>;		//0: no CS in single or chain
+	status = "okay";
+
+	adc: ad7988@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "ad7988";
+		spi-max-frequency = <1000000>;
+		vcc-supply = <&extreg_5v>;
+		reg = <0>;
+		conv-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+/ {
+	extreg_5v: ext-regulator-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "5V";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+};
diff -uprN linux-v4.14-at10/drivers/iio/adc/ad7988.c testADCfinal/drivers/iio/adc/ad7988.c
--- linux-v4.14-at10/drivers/iio/adc/ad7988.c	1970-01-01 09:00:00.000000000 +0900
+++ testADCfinal/drivers/iio/adc/ad7988.c	2019-01-16 14:26:15.245221100 +0900
@@ -0,0 +1,272 @@
+/*
+ * AD7988 SPI ADC driver
+ *
+ * Copyright (C) 2019 Atmark Techno, Inc. All Rights Reserved.
+ * Based on: ad7476.c
+ *   Copyright 2010 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/sysfs.h>
+#include <linux/spi/spi.h>
+#include <linux/regulator/consumer.h>
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/bitops.h>
+#include <linux/gpio.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
+
+#include <linux/iio/iio.h>
+#include <linux/iio/sysfs.h>
+#include <linux/iio/buffer.h>
+#include <linux/iio/trigger_consumer.h>
+#include <linux/iio/triggered_buffer.h>
+
+struct ad7988_state;
+
+struct ad7988_chip_info
+{
+	unsigned int int_vref_uv;
+	struct iio_chan_spec channel[2];
+	void (*reset)(struct ad7988_state *);
+};
+
+struct ad7988_state
+{
+	struct spi_device *spi;
+	const struct ad7988_chip_info *chip_info;
+	struct regulator *reg;
+	struct spi_transfer xfer;
+	struct spi_message msg;
+	int gpio_conv;
+	/*
+	 * DMA (thus cache coherency maintenance) requires the
+	 * transfer buffers to live in their own cache lines.
+	 * Make the buffer large enough for one 16 bit sample and one 64 bit
+	 * aligned 64 bit timestamp.
+	 */
+	unsigned char data[ALIGN(2, sizeof(s64)) + sizeof(s64)] ____cacheline_aligned;
+};
+
+enum ad7988_supported_device_ids
+{
+	ID_AD7988,
+};
+
+static irqreturn_t ad7988_trigger_handler(int irq, void *p)
+{
+	struct iio_poll_func *pf = p;
+	struct iio_dev *indio_dev = pf->indio_dev;
+	struct ad7988_state *st = iio_priv(indio_dev);
+	int b_sent;
+
+	b_sent = spi_sync(st->spi, &st->msg);
+	if (b_sent < 0)
+		goto done;
+
+	iio_push_to_buffers_with_timestamp(indio_dev, st->data,
+					   iio_get_time_ns(indio_dev));
+done:
+	iio_trigger_notify_done(indio_dev->trig);
+
+	return IRQ_HANDLED;
+}
+
+static int ad7988_scan_direct(struct ad7988_state *st)
+{
+	int ret;
+
+	ret = spi_sync(st->spi, &st->msg);
+	if (ret)
+		return ret;
+
+	return be16_to_cpup((__be16 *)st->data);
+}
+
+static int ad7988_read_raw(struct iio_dev *indio_dev,
+			   struct iio_chan_spec const *chan,
+			   int *val,
+			   int *val2,
+			   long m)
+{
+	int ret;
+	struct ad7988_state *st = iio_priv(indio_dev);
+
+	int scale_uv;
+
+	switch (m) {
+	case IIO_CHAN_INFO_RAW:
+		ret = iio_device_claim_direct_mode(indio_dev);
+		if (ret)
+			return ret;
+		gpio_direction_output(st->gpio_conv, 1);
+		udelay(10);
+		gpio_direction_output(st->gpio_conv, 0);
+		ret = ad7988_scan_direct(st);
+
+		iio_device_release_direct_mode(indio_dev);
+
+		if (ret < 0)
+			return ret;
+		*val = (ret >> st->chip_info->channel[0].scan_type.shift) &
+			   GENMASK(st->chip_info->channel[0].scan_type.realbits - 1, 0);
+		return IIO_VAL_INT;
+	case IIO_CHAN_INFO_SCALE:
+		if (!st->chip_info->int_vref_uv) {
+			scale_uv = regulator_get_voltage(st->reg);
+			if (scale_uv < 0)
+				return scale_uv;
+		} else {
+			scale_uv = st->chip_info->int_vref_uv;
+		}
+		*val = scale_uv / 1000;
+		*val2 = chan->scan_type.realbits;
+		return IIO_VAL_FRACTIONAL_LOG2;
+	}
+	return -EINVAL;
+}
+
+#define _AD7988_CHAN(bits, _shift, _info_mask_sep)			\
+	{														\
+	.type = IIO_VOLTAGE,									\
+	.indexed = 1,											\
+	.info_mask_separate = _info_mask_sep,					\
+	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),	\
+	.scan_type = {											\
+		.sign = 'u',										\
+		.realbits = (bits),									\
+		.storagebits = 16,									\
+		.shift = (_shift),									\
+		.endianness = IIO_BE,								\
+	},														\
+}
+
+#define AD7988_CHAN(bits) _AD7988_CHAN((bits), 16 - (bits),	\
+				       BIT(IIO_CHAN_INFO_RAW))
+
+static const struct ad7988_chip_info ad7988_chip_info_tbl[] = {
+	[ID_AD7988] = {
+		.channel[0] = AD7988_CHAN(16),
+		.channel[1] = IIO_CHAN_SOFT_TIMESTAMP(1),
+	},
+};
+
+static const struct iio_info ad7988_info = {
+	.driver_module = THIS_MODULE,
+	.read_raw = &ad7988_read_raw,
+};
+
+static int ad7988_probe(struct spi_device *spi)
+{
+	struct ad7988_state *st;
+	struct iio_dev *indio_dev;
+	int ret;
+	const char *string_prop;
+
+	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
+	if (!indio_dev)
+		return -ENOMEM;
+
+	st = iio_priv(indio_dev);
+	st->chip_info =
+		&ad7988_chip_info_tbl[spi_get_device_id(spi)->driver_data];
+
+	st->reg = devm_regulator_get(&spi->dev, "vcc");
+	if (IS_ERR(st->reg))
+		return PTR_ERR(st->reg);
+
+	ret = regulator_enable(st->reg);
+	if (ret)
+		return ret;
+
+	spi_set_drvdata(spi, indio_dev);
+
+	st->spi = spi;
+
+	/* Establish that the iio_dev is a child of the spi device */
+	indio_dev->dev.parent = &spi->dev;
+	indio_dev->dev.of_node = spi->dev.of_node;
+	indio_dev->name = spi_get_device_id(spi)->name;
+	indio_dev->modes = INDIO_DIRECT_MODE;
+	indio_dev->channels = st->chip_info->channel;
+	indio_dev->num_channels = 2;
+	indio_dev->info = &ad7988_info;
+	/* Setup default message */
+
+	st->xfer.rx_buf = &st->data;
+	st->xfer.len = st->chip_info->channel[0].scan_type.storagebits / 8;
+
+	spi_message_init(&st->msg);
+	spi_message_add_tail(&st->xfer, &st->msg);
+
+	ret = iio_triggered_buffer_setup(indio_dev, NULL,
+					 &ad7988_trigger_handler, NULL);
+	if (ret)
+		goto error_disable_reg;
+
+	if (st->chip_info->reset)
+		st->chip_info->reset(st);
+
+	ret = iio_device_register(indio_dev);
+	if (ret)
+		goto error_ring_unregister;
+
+	st->gpio_conv = 0;
+
+	ret = of_get_named_gpio(indio_dev->dev.of_node, "conv-gpio", 0);
+	if (ret < 0) {
+		dev_err(&indio_dev->dev, "conv-gpio property not found\n");
+		st->gpio_conv = -1;
+	} else {
+		st->gpio_conv = ret;
+		gpio_direction_output(st->gpio_conv, 0);
+	}
+
+	return 0;
+
+error_ring_unregister:
+	iio_triggered_buffer_cleanup(indio_dev);
+error_disable_reg:
+	regulator_disable(st->reg);
+
+	return ret;
+}
+
+static int ad7988_remove(struct spi_device *spi)
+{
+	struct iio_dev *indio_dev = spi_get_drvdata(spi);
+	struct ad7988_state *st = iio_priv(indio_dev);
+
+	iio_device_unregister(indio_dev);
+	iio_triggered_buffer_cleanup(indio_dev);
+	regulator_disable(st->reg);
+
+	return 0;
+}
+
+static const struct spi_device_id ad7988_id[] = {
+	{"ad7988", ID_AD7988},
+	{}
+};
+MODULE_DEVICE_TABLE(spi, ad7988_id);
+
+static struct spi_driver ad7988_driver = {
+	.driver = {
+		.name	= "ad7988",
+	},
+	.probe		= ad7988_probe,
+	.remove		= ad7988_remove,
+	.id_table	= ad7988_id,
+};
+module_spi_driver(ad7988_driver);
+
+MODULE_AUTHOR("Atmark Techno, Inc.");
+MODULE_DESCRIPTION("Analog Devices AD7988 ADC driver");
+MODULE_LICENSE("GPL v2");
diff -uprN linux-v4.14-at10/drivers/iio/adc/Kconfig testADCfinal/drivers/iio/adc/Kconfig
--- linux-v4.14-at10/drivers/iio/adc/Kconfig	2018-12-26 11:44:47.000000000 +0900
+++ testADCfinal/drivers/iio/adc/Kconfig	2019-01-16 09:34:42.394462800 +0900
@@ -130,6 +130,18 @@ config AD799X
 	  To compile this driver as a module, choose M here: the module will be
 	  called ad799x.
 
+config AD7988
+	tristate "Analog Devices AD7988 ADC driver"
+	depends on SPI
+	select IIO_BUFFER
+	select IIO_TRIGGERED_BUFFER
+	help
+	  Say yes here to build support for Analog Devices
+	  AD7988 SPI analog to digital converter (ADC).
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called ad7988.
+
 config ASPEED_ADC
 	tristate "Aspeed ADC"
 	depends on ARCH_ASPEED || COMPILE_TEST
diff -uprN linux-v4.14-at10/drivers/iio/adc/Makefile testADCfinal/drivers/iio/adc/Makefile
--- linux-v4.14-at10/drivers/iio/adc/Makefile	2018-12-26 11:44:47.000000000 +0900
+++ testADCfinal/drivers/iio/adc/Makefile	2019-01-16 09:33:31.151102200 +0900
@@ -15,6 +15,7 @@ obj-$(CONFIG_AD7791) += ad7791.o
 obj-$(CONFIG_AD7793) += ad7793.o
 obj-$(CONFIG_AD7887) += ad7887.o
 obj-$(CONFIG_AD799X) += ad799x.o
+obj-$(CONFIG_AD7988) += ad7988.o
 obj-$(CONFIG_ASPEED_ADC) += aspeed_adc.o
 obj-$(CONFIG_AT91_ADC) += at91_adc.o
 obj-$(CONFIG_AT91_SAMA5D2_ADC) += at91-sama5d2_adc.o
